Australian scientists design a full-scale architecture for a quantum computer in silicon

CAPTION This picture shows from left to right Dr Matthew House, Sam Hile (seated), Scientia Professor Sven Rogge and Scientia Professor Michelle Simmons of the ARC Centre of Excellence for Quantum Computation and Communication Technology at UNSW. CREDIT Deb Smith, UNSW Australia

Physicists at UNSW Australia and the University of Melbourne have designed a scalable 3-D silicon chip architecture based on single atom quantum bits, providing a blueprint to build operational quantum computers

Australian scientists have designed a 3D silicon chip architecture based on single atom quantum bits, which is compatible with atomic-scale fabrication techniques - providing a blueprint to build a large-scale quantum computer.

Scientists and engineers from the Australian Research Council Centre of Excellence for Quantum Computation and Communication Technology (CQC2T), headquartered at the University of New South Wales (UNSW), are leading the world in the race to develop a scalable quantum computer in silicon - a material well-understood and favoured by the trillion-dollar computing and microelectronics industry.

Teams led by UNSW researchers have already demonstrated a unique fabrication strategy for realising atomic-scale devices and have developed the world's most efficient quantum bits in silicon using either the electron or nuclear spins of single phosphorus atoms. Quantum bits - or qubits - are the fundamental data components of quantum computers.

One of the final hurdles to scaling up to an operational quantum computer is the architecture. Here it is necessary to figure out how to precisely control multiple qubits in parallel, across an array of many thousands of qubits, and constantly correct for 'quantum' errors in calculations.

Now, the CQC2T collaboration, involving theoretical and experimental researchers from the University of Melbourne and UNSW, has designed such a device. In a study published today inScience Advances, the CQC2T team describes a new silicon architecture, which uses atomic-scale qubits aligned to control lines - which are essentially very narrow wires - inside a 3D design.

"We have demonstrated we can build devices in silicon at the atomic-scale and have been working towards a full-scale architecture where we can perform error correction protocols - providing a practical system that can be scaled up to larger numbers of qubits," says UNSW Scientia Professor Michelle Simmons, study co-author and Director of the CQC2T.

"The great thing about this work, and architecture, is that it gives us an endpoint. We now know exactly what we need to do in the international race to get there."

In the team's conceptual design, they have moved from a one-dimensional array of qubits, positioned along a single line, to a two-dimensional array, positioned on a plane that is far more tolerant to errors. This qubit layer is "sandwiched" in a three-dimensional architecture, between two layers of wires arranged in a grid.

By applying voltages to a sub-set of these wires, multiple qubits can be controlled in parallel, performing a series of operations using far fewer controls. Importantly, with their design, they can perform the 2D surface code error correction protocols in which any computational errors that creep into the calculation can be corrected faster than they occur.

"Our Australian team has developed the world's best qubits in silicon," says University of Melbourne Professor Lloyd Hollenberg, Deputy Director of the CQC2T who led the work with colleague Dr Charles Hill. "However, to scale up to a full operational quantum computer we need more than just many of these qubits - we need to be able to control and arrange them in such a way that we can correct errors quantum mechanically."

"In our work, we've developed a blueprint that is unique to our system of qubits in silicon, for building a full-scale quantum computer."

In their paper, the team proposes a strategy to build the device, which leverages the CQC2T's internationally unique capability of atomic-scale device fabrication. They have also modelled the required voltages applied to the grid wires, needed to address individual qubits, and make the processor work.

"This architecture gives us the dense packing and parallel operation essential for scaling up the size of the quantum processor," says Scientia Professor Sven Rogge, Head of the UNSW School of Physics. "Ultimately, the structure is scalable to millions of qubits, required for a full-scale quantum processor."

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