University Of Mannheim Develops Reference Design Kit to Enable Rapid Deployment

SPECIAL COVERAGE FROM ISC2006 -- The HyperTransport Technology Consortium, a non-profit organization dedicated to developing, promoting and licensing the industry's lowest latency, highest bandwidth HyperTransport interconnect technology, today announced that researchers at the University of Mannheim (Mannheim, Germany) have developed a highly programmable HTX OEM reference design kit. The kit is intended to facilitate the rapid deployment of peripheral card subsystems based on the HyperTransport HTX connector specification, and is on display this week at the International Supercomputing Conference 2006, Booth B39-B42, in Dresden, Germany. The HTX connector specification, standardized by the HyperTransport Technology Consortium, defines an interface for linking high-performance subsystems directly to the system CPU or CPUs via low-latency HyperTransport links. OEMs today are leveraging the HTX connector in low-latency server clustering, network security processing, packet management and math acceleration. The University of Mannheim's HTX reference design kit includes all of the necessary hardware and software, schematics and bill of materials information needed to design and debug peripheral products based on the HTX connector specification. It also includes a prototyping board to enable OEMs to quickly test and evaluate their HTX subsystem features and functionality. "The University of Mannheim -- one of our international academic members -- has delivered a precious development tool, particularly useful to reduce development costs, resource investments and time-to-market for HTX-based OEM solutions," said Mario Cavalli, general manager of the HyperTransport Consortium. "With this design kit, peripheral manufacturers have a much-needed blueprint for the development of high-performance, low-latency peripheral subsystems, increasingly in demand for data center, scientific and industrial applications." "Our goal was to create a rapid prototyping and development platform that would enable system designers to take advantage of the superior performance delivered by state-of-the-art HTX connectivity and FPGA components," said Prof. Ulrich Bruning, University of Mannheim. "With the HTX direct-connect CPU interface, designers can deliver powerful, high performance computing systems ideally suited for network, enterprise, media, communications and storage industry sectors, as well as application-specific co-processing applications. This kit is an important tool in enabling the rapid deployment of peripheral designs based on HTX." The HTX reference board features HyperTransport HTX direct-connect slot interface (16-bit wide), highly sophisticated Xilinx Virtex-4 FX60 FPGA, several high speed serial links (connected to six SFPs and one SATA connector), 128 MByte double data rate (DDR2) DRAM (optional 512 MByte) with a 32-bit wide interface, 512 Mbit user-programmable flash memory and a Gigabit Ethernet transceiver with a RJ45-connector. The HTX reference design board can be plugged into any HyperTransport HTX-capable system or motherboard. The reference design kit is currently available upon request through the University of Mannheim. Interested parties should contact Prof. Ulrich Bruning via e-mail at ulrich@ra.ti.uni-mannheim.de. Detailed information on the HTX reference design can also be found on the HyperTransport Consortium website at its Web site.