ACADEMIA

The model was implemented in the Finis terrae

As systems grow and become more complex, so has the need to understand what happens inside a program. The researcher Juan Angel Lorenzo del Castillo, in his thesis addressed at the University of Santiago de Compostela and developed jointly with the CESGA and the University of A Coruña through a project with HP, has developed mechanisms to evaluate the performance of applications running on them and improve memory usage and the processors, getting less execution time, getting faster results and lower energy consumption in supercomputers. The model was implemented in the Finis terrae supercomputer.

"Although we are not aware of it, supercomputing applications play an important role in our daily lives," says researcher John Lawrence Angel Castillo, who now works in HP Labs Bristol, UK, and recently performed at the Supercomputing Center of Galicia-oriented research to improve processors performance making up the supercomputer 'Finis Terrae' at CESGA.

"The programs used to predict the weather, applications that perform complex calculations in stock, or simulations of protein folding relevant in the fight against cancer are examples of parallel supercomputing applications. In parallel, for calculating and allocate work among multiple computers and supercomputing, because they require more powerful equipment than home computers. An example of a supercomputer is the machine 'Finis Terrae' which CESGA has, says the researcher.

Juan Angel Lawrence notes that "in this context, it is clear the need to ensure the implementation of these programs as efficiently as possible, to save time and money. Traditionally, application performance evaluation was done at the level of operating system, using the tools available to measure aspects such as memory usage or processors. However, these tools lacked sufficient precision in some cases."

Hardware Accountants

But chip makers like Intel and AMD have spent years in their designs including elements of measurement, called ‘contadores hardware’ (hardware accountants), to test the proper operation of its processors before being marketed. And in the last decade, these accountants were made available to users, "so it is now possible to much more accurately assess the performance of a given application due to the accurate and unobtrusive that contadores send a performance evaluation program, typically called a profiler" he says.

“My collaboration with CESGA during my PhD at the University of Santiago de Compostela-remembers Juan Angel Lorenzo ‘contadores hardware’ study focused on Itanium2 microprocessors in the 'Finis Terrae'. They have some very advanced ‘contadores hardware’ called Event Address Registers (EAR), which lead to, among others, the exact position of memory in which a particular event occurred during the execution of a program. During my thesis elaborated mechanisms to not only evaluate the performance of applications running on them, but also take effective action, at runtime, to improve memory usage and processors. Thus, applications can run more efficiently, which means less run time, obtain faster results, and lower power consumption. My thesis 'Performance counter-based Strategies to improve data locality on multiprocessor systems: Reordering and page migration techniques' was conducted by Professor Francisco Fernández Rivera and Juan Carlos Pichel Campos."

Links a publicaciones especializadas: El texto completo de la tesis se puede consultar en: a) Performance Counter-based Strategies to Improve Data Locality on Multiprocessor Systems: Reordering and Page Migration Techniques
http://www.ac.usc.es/node/1588 b) Lessons Learnt Porting Parallelisation Techniques for Irregular Codes to NUMA Systems
http://www.ac.usc.es/node/1506 c) Study of Performance Issues on a SMP-NUMA System Using the Roofline Model
http://www.ac.usc.es/node/1575