AEROSPACE
Cray Implements Denali's Databahn Memory Controller Cores
Denali Software Inc., today announced that Cray Inc. has selected its Databahn memory controller intellectual property (IP) cores and MMAV verification IP software for next-generation supercomputer product development. Cray plans to use Denali's Databahn IP in the design of the DDR-SDRAM memory system for its next-generation chips. Cray will also use Denali's MMAV product for modeling and simulating the interactions between its chips and external memory devices for design verification and performance analysis. Says Dave Kiefer, vice president of engineering at Cray: "Designing supercomputers demands leading-edge EDA tools and IP. We selected Denali's MMAV and Databahn controller cores based on the product capabilities as well as Denali's reputation for quality and reliability." "Cray stands apart as a leader in the supercomputer race," adds David Lin, Denali's vice president of applications engineering. "By providing Cray with memory controller cores and verification software, we are helping them continue to meet their rigorous standards for quality and performance." About Databahn Memory Controller IP Licensed for use in more than 100 designs by leading semiconductor and system companies, and with more than 35 chips in production, Databahn is the industry-leading memory controller IP solution. Databahn cores are configurable for a wide range of performance and power requirements, as well as ASIC interfaces. To ensure compatibility with all the latest high-speed memory technologies, the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest SDRAM, DDR1-SDRAM, DDR2-SDRAM, and Mobile DDR-SDRAM devices from all major memory vendors. Deliverables include: register transfer level (RTL) and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, programmable register settings and documentation. The silicon-proven Databahn IP is library independent and covers solutions from .18-micron to .08-micron technologies, and DRAM device frequencies from 100-400MHz (200-800MHz data rate).