BIOLOGY

DRC today announces their selection by Cray Inc. to provide a new Coprocessor Module as a massively parallel reconfigurable option for future Cray supercomputers. DRC makes a coprocessor module that plugs into a standard multi-processor AMD Opteron system, providing direct access to adjacent DDR memory and Opteron processors at HyperTransport speed and nanosecond latency. Tight coupling between CPU and memory means that bandwidth and latency bottlenecks are virtually eliminated, allowing 10x to 100x performance improvement while lowering power and heat requirements. These benefits apply to the full range of high-performance computing systems, from entry level to the world's largest supercomputers. Cray first introduced FPGA-based reconfigurable computing as an option to the Cray XD1 product line. As part of its Adaptive Supercomputing vision, Cray has selected DRC's direct-connect coprocessor technology, not to interface into a single processor, but to interface directly into Cray's proprietary interconnect. "Interfacing FPGAs directly into Cray's interconnect allows multiple system processors to interact with multiple FPGAs in any ratio the customer may require," says Jan Silverman, senior vice president of corporate strategy and business development at Cray. "This solution enhances our Adaptive Supercomputing vision by adding flexible, high-bandwidth FPGA acceleration to our other processor capabilities, opening new doors for significant application acceleration by our customers." "We are very excited about the opportunity to work with Cray to provide this technology to some of the largest National Laboratory, DOD, and DOE users," says Larry Laurich, president and CEO of DRC Computer Corporation. "The power of FPGAs with reconfigurable computing is at a tipping point in comparison to standard processor solutions. The integration with the massively parallel capability of the Cray systems will set new levels of performance in many critical applications where algorithm acceleration is desired."