Design Integrates Multiple Trading Functions onto Single FPGA

in-FPGA Trading Systems has announced a hardware-accelerated automated trading reference design that performs NASDAQ ITCH feed handling and outbound OUCH order entry running on 10Gb Ethernet, with under two microseconds of latency. The system is to be shown at the 2010 High Performance Computing Financial Markets show and conference, booth 424, in New York City on September 20th, 2010.

The in-FPGA system allows traders to achieve response latencies that are a fraction of what can be achieved using CPU-based systems. Visitors to the show will be able to see actual hardware used for market data decoding and outbound order entry, with all functionality performed entirely in high performance Field Programmable Gate Array (FPGA) logic. The resulting system achieves sub 2-microsecond latency today, with expected improvements in throughput being made throughout 2010. These FPGA-based reference platforms will operate at several times the speed of larger microprocessor based servers.

Trading performed by traditional CPU-based systems, frequently implemented as Linux servers with off-the-shelf network interface hardware, achieves response times on the order of tens of microseconds. In some cases the feed handling functionality is accelerated using FPGAs inside Linux servers with results being processed by a CPU-based application.

The in-FPGA approach is to integrate all three core trading functions: feed handling, trade trigger logic and analytics, and outbound order entry into a single FPGA, with little or no need for a host CPU. The in-FPGA solution therefore allows traders to reach new levels of response time latency. Because an FPGA is the core of the trading platform, all trading logic is implemented directly in hardware. Implementing all needed functions in hardware provides acceleration by eliminating the overhead of shared resources including buses and operating systems.

The specific trading logic required by a customer is reduced to hardware using an optimizing C-to-FPGA compiler made by Impulse Accelerated Technologies. in-FPGA helps clients by providing working reference platforms along with application developer training, allowing customers to achieve FPGA-based latencies and deploy into data-centers in the shortest time practical.

The in-FPGA system is delivered as a standard 1U rack mount chassis that includes an FPGA processing board. The board features a powerful Altera Stratix IV FPGA. Customized platforms allowing higher FPGA densities are available. The development platform includes the Impulse C-to-FPGA compiler, allowing customers to add or modify their proprietary trading logic algorithms. in-FPGA systems are supplied with one FPGA based reference application for an ITCH feed handler and a sample outbound OUCH order entry module.

"It's all about trading latency," said Cameron Elliott, chief designer of the in-FPGA system. "FPGA-based trading can respond to market data an order of magnitude faster than Linux based servers, and 2-5 times faster than hybrid CPU/FPGA systems. Much of the gain comes from simplifying the hardware path, consolidating processing on one hardware chip and eliminating high latency paths. What makes this most exciting for traders is that they can implement their trade trigger logic in C-language using Impulse C, rather than having to learn hardware description languages such as Verilog or VHDL, or having to pass their models off to hardware engineers for translation."

Impulse tools are in use at major financial firms and hedge funds where they have equipped mathematicians and algorithm developers to dramatically improve latency.  "in-FPGA's trading system and reference application enables software developers to use hardware acceleration for 10Gb Ethernet processing," said David Buechner, Vice President of Impulse. "This offers a disruptive technology for trading firms who want to be the first in the queue with their trades".