GOVERNMENT

International Business Machines is claiming a breakthrough in developing circuitry to store data on future microprocessor chips. In papers presented at the International Solid State Circuits Conference (ISSCC) today, IBM revealed a first-of-its-kind, on-chip memory technology that features the fastest access times ever recorded in eDRAM (embedded dynamic random access memory). This type of memory, which was developed using IBM's Silicon-on Insulator, is three times denser than conventional SRAM (static RAM) chip memory and can offer users twice the performance of a conventional chip, said Subramanian Iyer, director of the IBM's 45-nanometer development. IBM has used this type of dense DRAM memory before, most notably in its Blue Gene supercomputer models. The technology is expected to be a key feature of IBM’s 45nm (nanometer) microprocessor roadmap and will become available beginning in 2008. IBM’s new eDRAM technology, designed in stress-enabled 65nm SOI using deep trench, dramatically improves on-processor memory performance in about one-third the space with one-fifth the standby power of conventional SRAM (static random access memory). By increasing the size of the cache and allowing more data to flow through the core, the engineers have allowed the chip to perform much faster at low power. “With this breakthrough solution to the processor/memory gap, IBM is effectively doubling microprocessor performance beyond what classical scaling alone can achieve,” said Dr. Iyer. “As semiconductor components have reached the atomic scale, design innovation at the chip-level has replaced materials science as a key factor in continuing Moore’s Law. Today’s announcement further demonstrates IBM’s leadership in this critical area of microprocessor design innovation.” IBM innovations in microelectronics and the company's groundbreaking system-on-a-chip designs have transformed the world of semiconductors. IBM breakthroughs include High-k, which enhances the transistor’s function while allowing it to be shrunk beyond today's limits, dual-core and multi-core microprocessors, copper on-chip wiring, silicon-on-insulator and silicon germanium transistors, strained silicon, and eFUSE, a technology that enables computer chips to automatically respond to changing conditions. The White House has awarded IBM the National Medal of Technology, the nation's highest technical honor, for 40 years of innovation in semiconductors. Cache memory typically uses a kind of circuitry used on chips called SRAMs, or static random-access memories. SRAMs are fast but require six transistors to store a single bit of data, and the more widely used chip known as DRAMs, only need one transistor and another component, a capacitor, to store a bit. DRAMs, though they can store more data in a smaller space, have generally been considered too slow for cache memory. Exploiting a manufacturing technology, silicon-on-insulator, IBM has developed unusually fast DRAM circuitry for use as cache memory. Iyer estimates it takes 1.5 nanoseconds, or billionths of a second, to fetch data from its enhanced DRAM technology, compared with 10 to 12 nanoseconds for conventional DRAMs and 0.8 to 1 nanoseconds for SRAMs. AMD could benefit from the computer maker's memory research, according to the report. An AMD spokesman said the company is "evaluating a number of new and emerging technologies" for cache memory. "We think this is the next big thing in getting more system performance," said Lisa Su, IBM's vice president of semiconductor research and development. "We kill ourselves in the semiconductor industry to try to get a little bit more performance in each generation. What we're doing here is trying to merge two technologies... on the same chip to get significantly more memory,'' said Su. eDRAM Specifications Among the specifications of IBM’s high-performance eDRAM technology: cell size: 0.126 mm2 Power supply: 1 V availability: 98.7% Tile: 1K RowX16 Col X146 (2Mb) AC power: 76 mW standby keep alive Power: 42 mW Random cycle time: 2ns Latency: 1.5ns