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ClearSpeed Advance Accelerators Increase TSUBAME Performance to 47 TeraFLOPS -- a 24 Percent Performance Increase Delivered With Only a One Percent Increase in Energy Consumption: ClearSpeed Technology, the world leader in floating point coprocessor acceleration technology for high performance and technical computing (HPTC), today announced that the Tokyo Institute of Technology's TSUBAME supercomputer is the first accelerated cluster based on general purpose industry-standard servers to achieve a ranking in the top ten among the world's fastest systems listed in the TOP500. The ClearSpeed accelerated result of 47 TeraFLOPS is a 24 percent performance boost from the non-accelerated performance of 38 TeraFLOPS published in the June 2006 TOP500 list. The increased performance, which is delivered with only a one percent increase in energy consumption, has enabled the TSUBAME supercomputer to achieve a ninth place ranking on the TOP500 list published this week at the 2006 Supercomputing conference in Tampa, Florida. "Acceleration has recently been touted as the wave of the supercomputing future, and we are happy to demonstrate this as a fact for the first time in the world at the very upper portion of the TOP500," said Professor Satoshi Matsuoka of the Global Scientific Information and Computing Center (GSIC) of Tokyo Institute of Technology (Tokyo Tech). "Tokyo Tech GSIC worked very hard and closely with the ClearSpeed team to achieve a 9 TeraFLOPS increase in performance from our previous result, with very little addition to power requirements and no overhead in space." Power consumption has become a critical problem for supercomputers, which pack tens of thousands of processors together to perform lengthy and complex tasks. Powering them, and then keeping them cool, is now a major cost item for supercomputer installations. Tokyo Tech has estimated that the TSUBAME's innovative and record-setting architecture will save them up to a $1 million per year in combined facilities and energy costs, amounting to a reduction of between 10 and 20 percent of the system's total cost of ownership. Delivering IEEE standard compliant accuracy for double precision calculations and increasing LINPACK performance by over a gigaflop per watt, ClearSpeed Advance accelerators are unmatched in their performance, precision and power efficiency by any alternative technology. "Together ClearSpeed and Tokyo Tech have convincingly demonstrated that, from this point forward, mainstream HPTC systems will be architected by combining industry standard-platforms with purpose-designed acceleration technology," said Stephen McKinnon, ClearSpeed Technology's chief operating officer. "The performance achievements and cost savings speak for themselves. The endorsements of the community and vendors alike confirm that ClearSpeed is paving the way for a new era of energy-efficient high performance and technical computing." ClearSpeed Presence at SC06 ClearSpeed Technology will be exhibiting and presenting at SC06 in Tampa, Florida, November 11 - 17, 2006. Demonstrations include record-breaking LINKPACK performance per watt that scales from desktops to TeraFLOPS; acceleration for scientific applications with Wolfram Research's Mathematica(R); acceleration for financial algorithms using Monte Carlo simulation; and ClearSpeed's software development environment. John Gustafson, ClearSpeed's chief technology officer for HPC will be delivering a talk on Acceleration Technologies: Understanding the Differences and Assessing What's Right for You at 4:00 p.m. on Tuesday, November 14 at the Tampa Convention Center, Room 13. ClearSpeed Advance technology will also be featured at the Intel(R) booth (#1523) demonstrating acceleration of a cluster of four 3.0 GHz Intel Xeon 5160 based servers running the high performance LINPACK benchmark and capable of delivering 364 GFLOPS while adding only 200 Watts to the overall power levels. In addition, ClearSpeed will be represented in the IBM, and Sun booths.