ClearSpeed Expands U.S. Office and Adds Training Center

ClearSpeed Technology, a developer of high-performance, low-power, programmable coprocessor solutions, today announced the company is expanding its U.S. office and relocating to a larger facility to accommodate the company's rapid growth. The number of employees in San Jose, California has doubled since April 2005 and the company is looking to hire for several more positions. With the expansion, the San Jose office will become the primary location for all customer relations and support, and will include a fully-equipped training center for customers and partners. The company has also begun a search for a Chief Operating Officer (COO) to be located in this office. The office expansion is being funded in part by a recent share placement of $36.5 million. These funds will be used by ClearSpeed to capitalize on its position as the designer and supplier of the world's fastest and most power efficient multi-core microprocessor for 64-bit floating point performance. Funds were officially received on December 29, 2005. "The San Jose office is a strategically important location for ClearSpeed during this time of growth," said Tom Beese, ClearSpeed chief executive officer. "With the close of a new round of funding and our planned shipments to major customers, the expanded office will enable us to maintain a high level quality in our ongoing training and support of customers." ClearSpeed will be making shipments this quarter to such customers as the Tokyo Institute of Technology, which is expected to be one of the top ten supercomputers in the world. Over the next six months, ClearSpeed is looking to engage with a select number of partners on similar projects. "Many high-performance computing systems today require more energy and dissipate more heat than existing infrastructures can tolerate," observed Nathan Brookwood, principal analyst with Insight 64 in Saratoga, CA. "ClearSpeed's solution should prove valuable to any high-performance computing establishment that seeks increased performance but must live with constraints related to power, heat, weight or space." The ClearSpeed Advance board is an application acceleration technology that complements host CPUs, working alongside them to process compute-intensive math library routines. The cost of powering a typical CPU server for four years (a typical life span) currently costs 50 percent of the initial hardware investment. ClearSpeed Advance boards decrease the overall power consumption while significantly increasing performance. A typical workstation runs at 8 GFLOPS LINPACK using 330 Watts; the addition of a ClearSpeed Advance board enables the workstation to perform at 30.2 GFLOPS sustained LINPACK using about 300 Watts of power. This represents a 265 percent increase in performance with a 10 percent decrease in power consumption. The ClearSpeed Advance board is currently being offered as a PCI-X plug-in board that can be easily integrated as a high-performance coprocessor accelerator in a workstation, server or cluster. The company's new address is 3031 Tisch Way, Suite 200, San Jose, CA 95128.