INDUSTRY

IBM will begin to talk about its third generation of chipsets for midrange and high-end X86 servers. The first-generation "Summit" EXA and second-generation "Summit-II" chipsets have help IBM grow revenue and shipment market share in the high-end X86 server space, and with the "Hurricane" X3 chipset, due within a few months, the company hopes to push the X86 higher into the server market while at the same time getting a larger slice of the four-way server market. The ServerWorks unit of Broadcom, which had dominant market share in two-way and four-way servers for a few years, has been pretty much sidelined by Intel Corp, which has been trying to regain the lead in chipsets for its own Xeon and Itanium processors for the past two years after ceding the high ground to ServerWorks, IBM, and Unisys Corp. But IBM is still in there, and is still getting enough information from sometimes partner, sometimes rival Intel to design new chipsets for the X86 platform. The word on the street is that Intel simply didn't give ServerWorks enough information on its 64-bit Xeon chips for the Broadcom unit to make extensions to its Grand Champion chipset, which could or could not have been a retaliation for ServerWorks deciding to not support the Itanium or Itanium 2 processors with its chipsets. This time around, with the Hurricane chipset, IBM is not planning to support the Itanium processors either, and it is unclear what repercussions this will have in the IBM-Intel relationship. Two years ago, tensions arose between IBM and Intel when it became clear that IBM's support of the Itanium processors with its Summit chipset was less than enthusiastic. IBM wants to bash Itanium to help it sell more Power-based servers, but at the same time, it needs to have decent relations with Intel, which makes the chips that fuel a server business that is almost equal in size to the Power-based server business at Big Blue. It is a delicate balance for IBM, which has spent $100m designing the Hurricane chipset and the xSeries servers that use it. According to Jay Bretzmann, director of eServer products at IBM, the Hurricane chipset is not supporting Itanium processors for a number of reasons. For one, the slow adoption of Itanium processors among corporate customers, with the possible exception of high-performance computing and data warehousing workloads, means that IBM is not interested. And while Bretzmann will not say this, in areas where customers want peak floating point performance, IBM's Power-based platforms can go toe-to-toe with Itanium on both price and performance, and that is exactly what IBM wants customers to buy. And finally, the very nature of the chipset means it is more difficult to create variants of Hurricane for Xeon and Itanium systems. With the Hurricane chipset, the memory and NUMA node controller that are currently separate electronic components on the Summit chipsets have been integrated and put on a single chip. The resulting XA-64E memory controller ties very tightly to the front side bus used in the future "Cranford" and "Potomac" Xeon MP processors, which will be the first Xeon MP processors to have 64-bit main memory extensions. Bretzmann says that IBM has alerted its Itanium server customers of the situation, and says the company will continue to sell the xSeries Itanium servers through the end of 2005; the will be support for a long time after that. The Hurricane chipset is being used as a demonstration platform for the Cranford Xeon MPs, which is why IBM is being allowed to talk about it at all. In fact, IBM has posted a TPC-C online transaction processing benchmark result of 102,667 transactions per minute on a four-way xSeries 365 using the Summit-II chipset and the 3GHz "Gallatin" Xeon MPs, and expects to show that an xSeries 366 server using the Hurricane chipset and the Cranford Xeon MP processors, which will have 1MB of on-chip L2 cache and run at 3.66GHz, will post around TPC-C results of around 142,000 TPM. The future Potomac Xeon MPs will run at 3.5GHz and higher and will add an 8MB L3 cache to the 1MB of L2 cache. The Foster and Gallatins Xeon MPs had much larger L2 caches and no L3 cache, but server designs often had L3 and even, in the case of the Summit chipsets, L4 caches. With the Hurricane chipset, IBM has design out the need for the L4 cache, and presumably in the Cranford boxes will not even include L3 cache. There is support for something IBM is calling a virtual L4 cache, which is probably a chunk of main memory carved out to act like a cache, just as we used to do back in the old days of the PC. That 38% performance boost is therefore remarkable, considering that about half of that comes from changes in the jump from Gallatin to Cranford or Potomac. The other half is coming from the chipset itself. Presumably, four-way Potomac systems will do even more work. The Hurricane chipset is the backbone of the 32-socket systems that xSeries general manager Susan Whitney has been hinting about since this time last year. The Hurricane chipset could eventually make its way into four-way blade servers for the BladeCenter chassis as well. Because of the radically different architectures of the Xeon MP and Opteron processors, Bretzmann says that the Hurricane chipset cannot be easily modified to support the Opteron chips from Advanced Micro Devices. If IBM wants to keep the Opterons in a box, it is in clustered, two-way Linux servers, and thus far, that is what it has done with its eServer 325 machines. IBM is not interested in supporting Opteron beyond this, even if Hurricane could be extended to support Opteron. The Hurricane chipset has support for memory links between the processors with 6.4GB/sec of bandwidth, which is one reason the architecture can scale to 32-socket processing. The chipset will support the impending single-core Cranford and Potomac Xeon MPs as well as their dual-core kickers. The chipset supports mirrored DDR2 main memory and redundant bit steering, both of which make the memory system more resilient; main memory on the xSeries 366 will top out at 64GB, but it will be as high as 512GB on the 32-way machine, which is the most main memory that Windows Server 2003 can address at this time. The chipset also supports the PCI-X 2.0 I/O specification, which runs at 256 MHz and delivers 2GB/sec of bandwidth, twice the performance of the PCI-X 1.0 spec. IBM also says that it has added special virtualization features to the Hurricane chipset; exactly what these are, we'll know within the next 90 days, which is when the Cranford chip is expected to be launched by Intel. The odds favor a launch at Intel Developer Forum.