INDUSTRY

LOS GATOS, CA -- Hifn™ (Nasdaq: HIFN) today announced a unique, scalable security processor architecture that makes it possible for high-speed next generation networks to operate securely, and thus enables the most advanced and highest-performance virtual private networks, secure e-commerce and firewalls. Labeled HIPP III (Hifn Intelligent Packet Processing), the new architecture will be applied to Hifn’s next generation highly integrated security processors to perform encryption, compression, public and private key transaction processing as well as firewall flow classification, within a single package. “The industry currently meets high-end security and firewall acceleration requirements with multiple processors,” says Doug Makishima, Hifn vice president of marketing. “This new architecture simplifies the design of routers, switches and firewalls by integrating the security functions into single entities, thereby making security transparent across the Internet, wide area and local area networks.” HIPP III is designed to deliver performance in the OC-12 to OC-192 range, which translates to performance up to 20 gigabits per second of packet and protocol processing. This includes executing all the relevant algorithms and classification in a single pass, while storing security association context data into SDRAM. The new architecture is the first in security processing to support multiple high-speed control and data buses, including PCI-X, HyperTransport, System Packet Interface Level 4, Phase 2 (OIF-SPI-4.2) and POS-PHY Level 4 (PL-4), in flow-through and look-aside modes. "HIPP III will offer significant improvements in feature set and performance," says Linley Gwennap, principal analyst at The Linley Group. "But the key advantage of this architecture is its combination of encryption and classification in a single chip, simplifying the design of next-generation firewall/VPN systems and improving time to market. Hifn is the only security-processor vendor that can deliver both of these functions." HIPP III utilizes Hifn’s patent-pending flow look-up engine to identify security associations on inbound packets, and it also incorporates on-chip support for Hifn’s Security Platform (HSP). Coupled with hardware acceleration for the LZS® compression algorithm, owned by Hifn, the new architecture is based on solid and unique intellectual property. HIPP III supports all major security and compressions protocols, including 256-bit AES. Specific products based on HIPP III will be announced before the end of the year.