INDUSTRY

TOKYO, JAPAN -- NEC Corp. (Nasdaq: NIPNY) and its wholly owned subsidiary in the United States, NEC Electronics Inc., today introduced the VR7701(TM) high-performance 64-bit MIPS® processor. The VR7701 processor is the first product in NEC's new VR7700(TM) family of integrated processors. The VR7700 processor core builds on NEC's highly acclaimed VR5500(TM) superscalar processor architecture by adding 256 kilobytes (KB) of on-chip level 2 (L2) cache and a high-speed double data rate (DDR) SDRAM memory controller. The VR7701 processor integrates a 400 megahertz (MHz) VR7700 processor core with a 64-bit 133 MHz PCI-X 1.0 bus interface and two 10/100Base Ethernet media access controllers (MAC), as well as several other key peripheral functions. This high-performance, highly integrated processor is an ideal solution for many demanding Internet applications including network switches and routers, storage devices and blade servers, which require large amounts of data to be moved as quickly as possible. "The VR7701 processor is the first step in NEC's roadmap to provide a variety of highly integrated microprocessors growing from our innovative VR5500 architecture," said George Wang, general manager, standard solutions strategic business unit, NEC Electronics Inc. "The VR7700 core builds on the performance and superscalar strengths of the VR5500 processor to support our customers developing next-generation products for advanced Internet infrastructure and storage applications. As we continue to evolve this product line, we will explore offering support for leading-edge networking standards such as HyperTransport(TM) and Gigabit Ethernet." "Since its introduction of the VR5500 microprocessor core last year, NEC has continued to improve the core's performance by increasing the operating frequency and optimizing compilers and other software tools to take better advantage of its architectural features," said Cary Snyder, senior analyst with Reed Electronics Group's In-Stat/MicroDesign Resources. "NEC is continuing to bring out products according to evolutionary roadmap plans announced at Embedded Processor Forum last year. Adding the L2 cache and DDR SDRAM interfaces to its VR5500 processor core to create the new VR7700 core should improve performance for a broader range of applications. NEC's VR5500 2001 Analysts' Choice award nomination for Best High-Performance Embedded Processor Chip was largely based on it being the best value in the embedded-processor space -- something NEC's VR7701 microprocessor is likely to build on." VR7701 Integrated Processor NEC's VR7701 integrated processor is manufactured using NEC's own 0.13-micron process, and is based on the new VR7700 processor core platform, which integrates a 400 MHz processor, a tightly coupled L2 cache, a DDR SDRAM controller, a high-speed NEC-proprietary on-chip bus and various peripherals. With a 1.5-volt (V) core, the VR7701 integrated processor consumes less than five watts of power under typical operating conditions. It supports either 2.5 - or 3.3V input/output (I/O) signals. The integrated VR7700 core is highly efficient for use in both general-purpose and application-specific integrated processor designs. It uses the same superpipelined out-of-order (OOO) instruction execution architecture developed for the VR5500 core to increase performance. The platform is flexible and can be adapted to support other communications interfaces such as HyperTransport, PCI Express or Infiniband, and deliver high-speed Internet access solutions such as Gigabit Ethernet. The NEC-proprietary on-chip bus operates at 200 MHz and supports multiple device ports that provide independent 64-bit read and write data paths to the processor's L2 cache and memory subsystem to minimize memory bottlenecks. The VR7701 L2 cache supports a four-way set associative writeback policy, a least recently used (LRU) algorithm and error code correction (ECC) protection. The memory controller supports both DDR and single-data rate (SDR) SDRAM dual in-line memory modules (DIMMs) with ECC protection. The integrated DDR/SDR SDRAM uses 128-byte burst transfers to match the L2 cache line size. The L2 cache and DDR/SDR SDRAM controller have a dedicated access path to reduce memory access times. The VR7701 processor also includes a PCI-X interface, two 10/100Base Ethernet controllers, a local bus unit with two serial interfaces, an interrupt controller and several timers. The PCI-X unit supports a 64-bit bus interface with 133 MHz clock frequency and has a 512-byte read/write buffer for slave operations and a 128-byte read/write buffer for master operations. The two-channel 10/100Base Ethernet MAC controller has independent direct memory access (DMA) and first in, first out (FIFO) buffers for send and receive packets to optimize Ethernet performance. The local bus unit not only supports 8-, 16-, and 32-bit device bus interfaces to connect boot flash ROM and standard peripherals, but also shares a bus bridge to connect two 16550-compatible serial interfaces, an interrupt controller, and a 10-channel interval timer.