Chief Scientist Highlights Steps to Develop 100 Gigabit Ethernet Standard

Tight integration and careful design methodology at the system level are fundamental requirements for ensuring high performance at 100 Gigabits per second speeds, said Joel Goergen, chief scientist and vice president of technology at Force10 Networks, during a meeting of the Optical Internetworking Forum (OIF) to review technical specifications for the emerging technology. "Defined system design requirements and integration will be crucial to the success and reliability of 100 Gig technology, and an essential component will be a high capacity backplane that does not act as an impediment to traffic from the interfaces," said Goergen. "A fundamentally new way of designing backplanes and having a 25 Gbps SERDES (serializer/deserializer) developed within the OIF will be the 100 Gig enablers the industry requires to move the technology forward." While the 10 Gigabit Ethernet market is still in its early stages of growth, with projections estimating that it will more than double in 2006 to $1.8 billion, research organizations and national laboratories are already anticipating the need for 100 Gigabit Ethernet capacity. Additionally, the design specifications for 100 Gigabit Ethernet will also enable higher system-level Gigabit and 10 Gigabit Ethernet densities, which will reduce network complexity and lower total cost of network ownership. With a lengthy process required for standardizing a technology, the industry needs to begin exploring the mechanics behind implementing 100 Gigabit Ethernet now to ensure availability coincides with early adopter demand. "It took the industry over five years to develop and standardize 10 Gigabit Ethernet and several more years for organizations to adopt it," said Goergen, one of several contributors to the 10 Gigabit Ethernet standard. "By examining the architectural issues involved in delivering 100 Gigabit Ethernet today, the industry will be better equipped to design the scalable systems that can accommodate the move to the next iteration of Ethernet technology." At the foundation of the Force10 TeraScale E-Series is a high performance architecture designed to accommodate the transition from 10 Gigabit Ethernet to 40 or 100 Gigabit Ethernet. With a five Terabit per second backplane, the TeraScale E-Series is highly scalable, providing long-term investment protection as well as a foundation for not only today's network but for next generation networks as well. Supporting nearly 360 Gbps per chassis slot, the Force10 TeraScale E-Series is the only available solution that has the built-in capacity to support 100 Gigabit Ethernet today. At the OIF meeting, Force10 scientist Peter Tomaszewski gave a presentation on 100 Gigabit Ethernet interfaces and beyond as preparation for the development of a multi-vendor supported specification. The Force10 TeraScale E-Series provides the industry-leading densities and unmatched resiliency that alter network economics. Supporting 1,260 Gigabit Ethernet ports and 56 line-rate 10 Gigabit Ethernet ports, the TeraScale E-Series enables IT managers to reduce network complexity by collapsing multiple layers into a single one.