SCIENCE

SAN FRANCISCO, CA -- IMEC, Europe's largest independent center for the research and development of design, semiconductor and communications technologies, has launched a study to determine the practical limits of the semiconductor industry's primary workhorse manufacturing process technology known as CMOS. The IMEC industrial affiliation program (IIAP) called Advanced Device Implementation Program will determine if CMOS can be improved to perform at semiconductor gate lengths of 45nm down to 22nm. While current theory estimates that conventional CMOS will no longer be a viable mass manufacturing process technology at semiconductor gate lengths of sub-50nm, it is possible that the technology may be scalable even below 45nm. The typical problems of controlling short-channel effects while maximizing performance is the main obstacle of scaling CMOS. However, the constraints on device design for sub-45nm CMOS devices are much more severe and, therefore, require innovative solutions with new materials and/or device architectures. The 3-year Advanced Device Implementation Program for (sub-)45nm devices will identify the most critical limitations of scaling conventional CMOS, while also investigating potential advanced or alternative solutions for further improvements of silicon-based MOSFET technology. The main target is to provide clear indications about the most likely architectures for the 60- to 30nm technology nodes as mentioned in the latest version of the International Technology Roadmap for Semiconductors (ITRS). CMOS experiments will focus on front-end-of-line (FEOL) manufacturing issues such as gate stack, channel/substrate engineering, shallow junction formation, spacer technology and silicidation. A major part of the IIAP program is being devoted to the device implementation of high-k materials and metal gate for the ultra-small gate dimensions. The program also includes the support of advanced simulation tools and state-of-the-art characterization techniques. The program provides a unique platform to prove and incorporate IMEC's advanced work on process steps into real devices. The specific added value with respect to the work on module development lies in device level integration solving the technological problems of compatibility with full FEOL processing and in the study of aspects related to the influence of the new modules on device performance. Integration is not limited to one advanced process module, but is a combination of many of them. While the program will not address full integration issues of sub-45nm gate length CMOS, it will provide a timely investigation of the conceptual limitations of CMOS device performance and identify the most critical process modules facing the semiconductor industry. This program implies devices with nominal gate lengths of 45nm down to 22nm. IMEC's industrial affiliation program (IIAP) formula is recognized worldwide as one of the most successful partnership schemes in research and development. The collaborations are based on shared costs and risks and are built on sound intellectual property rules. Ten IIAPs in other research fields are already in progress. IMEC was founded in 1984 and today is Europe's leading independent research center for the development and licensing of microelectronics, and information and communication technologies (ICT). IMEC is headquartered in Leuven, Belgium, and has a staff of more than 1,000 people including more than 200 industrial residents. Its more than $100 million revenue is derived from agreements and contracts with Flemish government, the EC, MEDEA, the European Space Agency, equipment and material suppliers and semiconductor companies worldwide. For additional information visit www.imec.be