SCIENCE

MILPITAS, CA -- Chartered Semiconductor Manufacturing (Nasdaq: CHRT and SGX-ST: Chartered) today announced a new copper, low-k process for the fabrication of next-generation integrated circuits. The technology is initially targeted at semiconductors for communications applications such as high-performance optical networking and broadband data transport systems, and is also expected to be well suited for designs in computing and consumer electronics. A key deliverable of an agreement with Agere Systems to jointly develop manufacturing technologies, the new technology is scheduled for manufacture at Chartered as early as the first quarter of 2002. Chartered has successfully integrated copper interconnects with low-k dielectric materials in a 0.13-micron technology and has demonstrated yield on a static random access memory (SRAM) test vehicle. It is expected that the system performance of chips can be improved by as much as 20 percent using this copper, low-k fabrication process. The layout rules applied to the SRAM demonstration vehicle are approximately 5 to 10 percent tighter than current foundry offerings at the 0.13-micron node, enabling designers to realize six-transistor SRAMs with memory cells as small as 1.97-micron squared. The SRAM was processed using five levels of metal (up to eight are available) and employs state-of-the-art argon fluoride lithography processing at several critical levels. "The integration and manufacturing of copper with low-k dielectric materials is complex," said Dr. John Martin, chief technology officer at Chartered. "Teams of engineers spent the last 18 months characterizing the performance, reliability and scalability of low-k materials and are now developing a manufacturing process that enables companies to build faster, more efficient systems on silicon. We're extremely pleased with the results achieved to date, and expect even better performance as the technology is scaled to support the smaller physical dimensions of advanced semiconductors. The technology provides for large and fast memories, which, along with copper and low-k, are highly desirable for the communications-networking market." The technology has been realized using copper metalization and dielectrics systems provided by Novellus Systems. The copper low-k scheme integrates Novellus's chemical vapor deposition (CVD) low-k dielectric system with their copper barrier/seed deposition, copper plating and polymer removal systems. The dielectric constant of the CVD low-k material, known as CORAL(TM), is in the range of 2.7 to 2.8. This is significantly lower than the 3.6 value offered by currently available fluorinated silicate glass alternatives, which translates to a reduction in interconnect delays by as much as 20 percent. "With interconnect delays dominating the performance of many of today's high-performance communications ICs, the advantage offered by a five level copper interconnect and low-k solution cannot be overstated," said Dr. Wilbert van den Hoek, executive vice president, integration and advanced development, Novellus Systems. "Chartered's announcement marks an important milestone towards the successful integration of copper and advanced low-k dielectrics, offering a proven platform for addressing the system requirements of leading applications at 0.13-micron and below." For additional information visit www.charteredsemi.com