SCIENCE

ScaleMP has announced that its vSMP Foundation systems now leverage the power of Intel's Xeon Processor E7 family of microprocessors, code-named Westmere-EX – which provides up to 10 cores per socket – for creating virtual symmetric multiprocessing (SMP) systems from two to 128 nodes, enabling users to create the largest x86 shared-memory system available on the market.

“ScaleMP has always been at the forefront of high-performance computing systems by delivering powerful software tools for its customers, and our latest support of Intel Westmere-EX microprocessor is no exception,” said Shai Fultheim, founder and CEO of ScaleMP. “The combination of vSMP Foundation and Westmere-EX provides increased performance, thanks to higher frequency and the additional cores per socket, as well as unlimited memory scalability – with up to 64TB RAM per system.”

Intel Xeon® Processor E7 Family Westmere-EX is the world's first 32-nanometer microprocessor designed for mission-critical computing. It supports up to 10 cores, delivers up to 40 percent greater performance than the previous-generation processor and improves energy efficiency with a new feature that dynamically adjusts power consumption based on a given workload.

About vSMP Foundation

vSMP Foundation aggregates multiple industry-standard off-the-shelf x86 servers into one single virtual high-end system. vSMP Foundation provides customers with an alternative to traditional expensive symmetrical multiprocessing (SMP) systems and also offers simplified clustering infrastructure with a single operating system. It supports aggregation of up to 128 servers into a single virtual SMP system, providing customers with:

• Up to 64 TB of shared memory for large memory requirements
• Up to 1,024 processors (10,240 cores) virtual SMP, proven scalability and record-breaking memory bandwidth
• Ease of use and lowest total cost of ownership (TCO) for applications, with simplified cluster management and storage architecture
• Improved cluster utilization by providing a centralized and consolidated architecture