SCIENCE

The Linley Group will host the Linley Tech High-Speed Interconnects Seminar on November 3, at the Doubletree Hotel in San Jose, Calif. The event will feature presentations from leading companies involved in implementing interconnect technologies into their designs at the board level, over the backplane, chip-to-chip, and between systems.

Presenters and topics include:

• AppliedMicro Director of Systems Engineering Dariush Dabiri - "Electromagnetic Interference Cancellation for 10GBASE-T Receiver: New Challenges for Coexistence Between Wireless and Wireline Communication Systems"
   
• Finisar Strategic Technology Initiatives Katharine Schmidtke - "Technology Advancements in High-Bandwidth Optical Interconnects"
   
• Freescale System Architect, Network Systems Division, Jim Innis - "Meeting the Challenges of High Speed Connectivity in Embedded Applications"
   
• IDT Senior Product Manager Trevor Hiatt - "Technical Comparison of Ethernet and RapidIO in Intra- and Inter-chassis Usage"
   
• Marvell CTO, Enterprise Business Unit, Nafea Bshara - "40GbE Ethernet for Low-latency HPC Applications"
   
• MoSys Vice President of Technology Innovation and System Applications Michael Miller - "Bandwidth Density Challenge Beyond 100Gbps"
   
• PLX Technology Vice President of Engineering Vijay Meduri - "PCI Express as a Clustering and Remote-I/O Interconnect"
   
• Xilinx Senior Marketing Manager Panch Chandrasekaran and Senior Technical Marketing Manager Anthony Torza - "Building Optically Compliant High Performance Serial Links"

Registration

The Linley Tech High-Speed Interconnects Seminar takes place on Wednesday, Nov. 3, with a continental breakfast and registration beginning at 8:15. The Linley Tech High-Speed Interconnects Seminar is intended for OEMs, ODMs, board developers, software developers, press and the financial community. The Linley Group offers free attendance to qualified registrants who sign up by October 29.