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PALO ALTO, CA -- Agilent Technologies Inc. (NYSE:A) today announced what the company referred to as “breakthrough” results in a recent application-specific integrated circuit (ASIC) that provide a new level of input/output (I/O) performance and integration in a CMOS (complementary metal oxide semiconductor) process. The announcement confirms Agilent's ability to integrate 16 multi-rate serializer/deserializer (SerDes) channels operating up to 3.125 Gb/s on a single CMOS chip. In comparison, the current industry benchmark is only four channels per chip. "Successfully demonstrating this level of embedded SerDes integration at 3.125 Gb/s affirms Agilent's leading communications ASIC capabilities," said Martin Scott, manager of Agilent's Network Products Operation. "Our ASIC technology continues to push the limits of high-performance, cost-effective equipment at the heart of tomorrow's networks." The new level of performance was achieved by leveraging Agilent's experience integrating over 50 2.5 Gigabits per second SerDes transmit and receive channels on a test chip. The multi-rate ASIC is backward compatible with link rates down to 1.5 Gb/s and incorporates approximately half a million logic gates. The chip can also drive a signal approximately 20 meters over standard copper cable. For more information visit www.agilent.com