SYSTEMS

AUSTIN, TX -- The TACC IBM Regatta-HPC systems will be upgraded in July with a high-speed switch to create an integrated 64-processor system with a theoretical peak performance of 1/3 teraflops and an aggregate memory of 128GB. "Our staff and our users have given the new systems rave reviews, but many users have asked for the capability to run larger simulations. This has been on our roadmap for a year, and we're excited to make this happen next month," said TACC Director Jay Boisseau. An additional smaller "service" node will also be added to provide all interactive computing services and run serial jobs, thus enabling all 64 POWER4 processors of the Regatta-HPC nodes to be dedicated for large simulations. This will be one of the most powerful computing systems at a US academic institution. The IBM Regatta system is scheduled to be down July 8-17 for the installation of the switch, server node and associated software. During this period, TACC staff will conduct extensive tests to ensure that the new system is reliable and performs according to expectations. When the system is made available again to users, there will be new queues for larger jobs. The TACC IBM Regatta-HPC User Guide will be updated with the new information. "Our users should have no problems using the larger system, and the increased capability will enable them to address even larger, more challenging problems," said Dr. Kent Milfeld of the TACC HPC Group. Users with questions concerning the upgrade plans for the IBM systems should contact TACC via the TACC Consulting Form (www.tacc.utexas.edu/consulting).