ACADEMIA
NICS announces strategic engagement with Intel
- Written by: Cat
- Category: ACADEMIA
The University of Tennessee’s National Institute for Computational Sciences (NICS) announced today at SC11 that it has entered a multi-year strategic engagement with Intel Corporation to pursue development of next-generation, high-performance computing solutions based on the Intel® Many Integrated Core (Intel® MIC) architecture and the design of scientific applications emphasizing a sustainable approach for both performance and productivity.
Funded by the National Science Foundation (NSF) and located at Oak Ridge National Laboratory, NICS manages the Cray XT5 “Kraken,” the NSF’s most productive supercomputer. Intel is the world’s leader in silicon innovation and the designer of the Intel MIC architecture. Together, NICS and Intel make a formidable team for high-performance computing (HPC) development.
“As a leading center for high-performance computing, NICS is working with Intel to ensure that the Intel MIC architecture and its software environment are developed to meet the needs of the scientific supercomputing community,” explained Glenn Brook, director of the Application Acceleration Center of Excellence and head of the Intel MIC architecture initiative at NICS.
“Intel is pleased to work closely with NICS to help move highly parallel scientific codes from multi-core to many core technology,” said Raj Hazra, general manager of the Technical Computing Group at Intel Corporation. “Our partnership with NICS seeks to help scientists reduce application development time with the benefit of faster time to results and insight.”
Next-generation systems based on the Intel MIC architecture will combine multi-core Intel Xeon processors with Intel MIC co-processors. Such systems are expected to propel high-end computing from its current status at the petascale level to its future at the exascale level, when machines will be capable of a thousand trillion calculations per second.
Constructed around many-core processors that utilize the venerable x86 instruction set, the Intel MIC architecture will prove more versatile and serviceable than architectures based on graphics processing units (GPUs). Users will be able to reuse their existing codes and programming knowledge, allowing for immediate scientific discovery and increased productivity. Further, users will be able to use standardized approaches and tools such as OpenMP and Intel Parallel Studio to optimize their codes to achieve high performance on both host processors and co-processors.
"NICS has provided insight to Intel regarding the technology requirements of the scientific computing community," added Joe Curley, director of marketing for Intel's Technical Computing Group. "The impact of our partnership can be seen in the focus of our Intel MIC ‘Knights Ferry’ software development platform on extending well understood, high-level, standard programming languages and models."
NICS is committed to assisting NSF users with their transition to the Intel MIC architecture by researching parallelization techniques on the Intel MIC platform and by porting key NSF applications to the Intel MIC architecture in advance of its commercial release. NICS will also offer training on the Intel MIC architecture following its commercial debut.
“We want to help users prepare for future architectures so they can immediately make effective and efficient use of new technologies as they become commercially available,” stated Brook.
NICS has already successfully ported millions of lines of code—full applications using MPI and OpenMP, not just kernels—from a variety of scientific and engineering disciplines to the Intel MIC architecture. Now, NICS is preparing to expand its efforts by developing partnerships with NSF research teams to port and optimize key NSF research codes. To facilitate this activity, NICS is working with Intel to provide a cluster based on the Intel MIC architecture for use by NSF project teams early next year.
“Increasing problem sizes and solution times associated with groundbreaking science drive the need for new high-performance architectures,” said Brook. “We are committed to maximizing returns from the Intel MIC architecture while minimizing investments of time for development and training. We see the Intel MIC architecture as the fundamental technology that will drive the next generation of supercomputers to the heights of new scientific discoveries.”
Funded by the National Science Foundation (NSF) and located at Oak Ridge National Laboratory, NICS manages the Cray XT5 “Kraken,” the NSF’s most productive supercomputer. Intel is the world’s leader in silicon innovation and the designer of the Intel MIC architecture. Together, NICS and Intel make a formidable team for high-performance computing (HPC) development.
“As a leading center for high-performance computing, NICS is working with Intel to ensure that the Intel MIC architecture and its software environment are developed to meet the needs of the scientific supercomputing community,” explained Glenn Brook, director of the Application Acceleration Center of Excellence and head of the Intel MIC architecture initiative at NICS.
“Intel is pleased to work closely with NICS to help move highly parallel scientific codes from multi-core to many core technology,” said Raj Hazra, general manager of the Technical Computing Group at Intel Corporation. “Our partnership with NICS seeks to help scientists reduce application development time with the benefit of faster time to results and insight.”
Next-generation systems based on the Intel MIC architecture will combine multi-core Intel Xeon processors with Intel MIC co-processors. Such systems are expected to propel high-end computing from its current status at the petascale level to its future at the exascale level, when machines will be capable of a thousand trillion calculations per second.
Constructed around many-core processors that utilize the venerable x86 instruction set, the Intel MIC architecture will prove more versatile and serviceable than architectures based on graphics processing units (GPUs). Users will be able to reuse their existing codes and programming knowledge, allowing for immediate scientific discovery and increased productivity. Further, users will be able to use standardized approaches and tools such as OpenMP and Intel Parallel Studio to optimize their codes to achieve high performance on both host processors and co-processors.
"NICS has provided insight to Intel regarding the technology requirements of the scientific computing community," added Joe Curley, director of marketing for Intel's Technical Computing Group. "The impact of our partnership can be seen in the focus of our Intel MIC ‘Knights Ferry’ software development platform on extending well understood, high-level, standard programming languages and models."
NICS is committed to assisting NSF users with their transition to the Intel MIC architecture by researching parallelization techniques on the Intel MIC platform and by porting key NSF applications to the Intel MIC architecture in advance of its commercial release. NICS will also offer training on the Intel MIC architecture following its commercial debut.
“We want to help users prepare for future architectures so they can immediately make effective and efficient use of new technologies as they become commercially available,” stated Brook.
NICS has already successfully ported millions of lines of code—full applications using MPI and OpenMP, not just kernels—from a variety of scientific and engineering disciplines to the Intel MIC architecture. Now, NICS is preparing to expand its efforts by developing partnerships with NSF research teams to port and optimize key NSF research codes. To facilitate this activity, NICS is working with Intel to provide a cluster based on the Intel MIC architecture for use by NSF project teams early next year.
“Increasing problem sizes and solution times associated with groundbreaking science drive the need for new high-performance architectures,” said Brook. “We are committed to maximizing returns from the Intel MIC architecture while minimizing investments of time for development and training. We see the Intel MIC architecture as the fundamental technology that will drive the next generation of supercomputers to the heights of new scientific discoveries.”