Innovations in Lithography and Patterning Have Kept Intel Ahead of the Game As Devices Continue to Scale

Yan Borodovsky and Sam Sivakumar, leaders of lithographic process technology at Intel Corporation whose innovations have enabled the continued miniaturization of electronic components, are being honored by IEEE with the 2012 IEEE Cledo Brunetti Award. IEEE is the world’s largest technical professional association.

The award, sponsored by Taiwan Semiconductor Manufacturing Company Limited and the Brunetti Bequest, recognizes Borodovsky and Sivakumar for contributions to developing and implementing innovative lithographic and patterning equipment and processes to enable cost-effective scaling for logic technologies. The award will be presented tomorrow at the IEEE Symposium on VLSI Technology in Honolulu, Hawaii.

As the architects of Intel Corporation’s lithography technology and strategy, Borodovsky and Sivakumar have advanced the art and science of lithographic patterning and kept Intel at the forefront of continued miniaturization of electronic devices. Lithography involves using light to transfer integrated circuit patterns onto semiconductor materials during microfabrication. Borodovsky and Sivakumar have not only developed many pioneering techniques to advance the technology but helped see them through to high-volume manufacturing, benefitting not just Intel but the microelectronics industry as a whole.

Borodovsky and Sivakumar were instrumental in developing the first 45-nanometer (nm) lithography process for Intel in 2007. Employing a regular layout of unidirectional lines using double patterning allowed Intel to extend 193-nm dry lithography and roll out its 45-nm generation ahead of the industry.

Borodovsky and Sivakumar then developed a robust patterning process using immersion lithography for Intel’s 32-nm generation. Their contributions again enabled Intel to move this technology generation into high-volume manufacturing ahead of the industry.

Borodovsky and Sivakumar have also made innovative contributions to developing new resolution enhancement technology techniques, including pixelated phase masks, chromeless phase-shift masks and phase shifted masks derived through inverse lithography computational methods. These techniques have allowed the extension of 193-nm immersion lithography to the 22-nm node. This has resulted in the demonstration of the industry’s first 364-Mb static random access memory circuit followed in 2011 by mass production of Intel’s 22-nm process, which ushered in the era of Tri-Gate transistors.

An IEEE Member and Intel Senior Fellow who holds 20 patents, Borodovsky’s honors include an Intel Achievement Award. Borodovsky received his master’s degree in solid-state devices and physics from the Polytechnic Institute, Tula, Russia. He is currently director of advanced lithography with Intel Corporation, Hillsboro, Ore., where he has worked since 1987.

An IEEE Member and Intel Fellow, Sivakumar holds 33 patents and is the winner of 3 Intel Achievement Awards. He received his bachelor's degree in electrical engineering from the Indian Institute of Technology, Madras, India, and his master's degree in electrical engineering from the University of Illinois, Urbana-Champaign. Sivakumar is currently director of lithography with Intel Corporation, Hillsboro, Ore., where he has worked since 1990.