World's first vector performance exceeding 100 GFLOPS per single CPU core: NEC Corporation today announced the worldwide launch and availability of the SX series model "SX-9," the world's fastest vector supercomputer with a peak processing performance of 839 TFLOPS. The SX-9 features the world's first CPU capable of a peak vector performance of 102.4 GFLOPS per single core. In addition to the newly developed CPU, the SX-9 combines large-scale shared memory of up to 1TB and ultra high-speed interconnects achieving speeds up to 128GB/second. Through these enhanced features, the SX-9 closes in on the PFLOPS range by realizing a processing performance of 839 TFLOPS. The SX-9 also achieves an approximate three-quarter reduction in space and power consumption over conventional models. This was achieved by applying advanced LSI design and high-density packaging technology. In comparison to scalar servers incorporating multiple general-purpose CPUs, the vector supercomputer offers superior operating performance for high-speed scientific computation and ultra high-speed processing of large-volume data. The enhanced effectiveness of the new product will be clearly demonstrated in fields such as weather forecasting, fluid dynamics and environmental simulation, as well as simulations for as-yet-unknown materials in nanotechnology and polymeric design. NEC has already sold more than 1,000 units of the SX series worldwide to organizations within these scientific fields. Features of the new product

1. Enhanced groundbreaking performance from ultra high-speed CPU Inheriting existing vector architecture, the new product improves on this with the addition of an arithmetic unit and an increased number of vector pipelines. This has resulted in the development of the world's fastest single-chip vector processor with a computing performance of 102.4 GFLOPS per single core, and a wide memory bandwidth of 256GB/s. With a single node incorporating up to 16 CPUs, computing performance in excess of 1.6TFLOPS is achieved. The product also realizes a large-scale shared memory consisting of a memory capacity of 1TB.
2. Reduced TCO via high-density packaging and energy-saving technology The vector processor has been integrated into a single chip by applying leading-edge CMOS technology with 65-nanometer Cu (copper interconnects) and the most advanced LSI design technology. The use of high-density packaging technology in which processor(s) and memory are implemented on a single module, and an effective design that provides optimum cooling functions, has resulted in a reduction in both space and power consumption of the SX-9. The new product is approximately one quarter the size of conventional models and uses about quarter the power.
3. User-friendly computing environment The SX-9 is loaded with "SUPER-UX," basic software compliant with the UNIX System V operating system that can extract maximum performance from the SX series. SUPER-UX is equipped with flexible functions that can deliver more effective operational management compatible with large-scale multiple node systems. The use of powerful compiler library groups and program development support functions to maximize SX performance makes the SX-9 a developer-friendly system. Application assets developed by users can also be integrated without modification, enabling full leverage of the ultra high-speed computing performance of the SX-9.

"NEC's vector supercomputers are being utilized in a wide array of fields, including advanced weather forecasting, aerospace, the environment and fluid dynamics, and have won praise from international and domestic universities and research organizations worldwide, as well as private corporations, for their high sustained performance and price competitiveness," said Mr. Yoshikazu Maruyama, Senior Vice President and Member of the Board at NEC Corporation. "The SX-9 has been developed to meet the need for ultra-fast simulations of advanced and complex large-capacity scientific computing." The SX-9 will be showcased at SC07 (Supercomputing 2007), the world's largest supercomputing exposition, in Reno, Nevada from November 10 - 16. It will also be on display at iExpo2007 (NEC's own personal exhibition), at Tokyo's Big Site from December 5 - 7.