SCIENCE
Vitesse to Present at 2011 Ethernet Technology Summit
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- Category: SCIENCE
Vitesse Semiconductor has announced that two of its Ethernet technology experts will present at the 2011 Ethernet Technology Summit next week at the Santa Clara Marriott, Santa Clara, Calif.
Dr. Frank Chang is scheduled to present “4 x 25G-Based 100G Electrical to Optical Interfaces” during the High-Speed (25G) Signaling workshop slated for Tuesday, February 22, 2011 starting at 8:30 a.m. Later that day, Dr. Chang will chair the second part of this workshop beginning at 1 p.m. where technologists will speak to the advances in high-speed signaling necessary for server and storage consolidation. Advances in high-speed signaling are essential to meet the needs of server and storage consolidation, inter-processor communications, and multicore processor architectures. The successful resolution of issues critical to handling 40/100 Gigabit Ethernet (GE) and higher speed versions of high-speed InfiniBand, PCI Express, Fibre Channel and other interfaces will also be addressed.
As Principal Engineer, Systems at Vitesse, Dr. Chang specializes in optical systems engineering and IC product specifications along with definition issues for telecom, datacom, and PON access markets. Dr. Chang has authored or co-authored over 75 peer-reviewed journal and conference articles and represents Vitesse as an active contributor to standard-setting bodies including OIF/ITU, IEEE 802.3 and FSAN.
Mr. Jason Rock is one of several distinguished panelists who will speak during the Energy Efficient Ethernet session scheduled for Wednesday, February 23, 2011 at 9:50 a.m. The panel will lead discussions on topics related to the recent ratification of the Energy Efficient Ethernet standard (EEE), key green technology market trends, and plans for future energy reductions within the Ethernet industry.
Mr. Rock is a senior product marketing manager at Vitesse responsible for their award-winning EcoEthernet product line of GE PHY transceivers, and has both hardware and systems experience in physical layer interface and digital FPGA design. Mr. Rock has published several articles and holds a patent.