Andreas Kogler from the Institute of Applied Information Processing and Communications (IAIK) at TU Graz. Image source: Lunghammer - TU Graz
Andreas Kogler from the Institute of Applied Information Processing and Communications (IAIK) at TU Graz. Image source: Lunghammer - TU Graz

TU Graz's discovery of the CacheWarp vulnerability in AMD processors highlights the need for constant vigilance

Recent research conducted by the CISPA Helmholtz Centre for Information Security and Graz University of Technology in Austria (TU Graz) has uncovered a security vulnerability in AMD processors. This vulnerability, called CacheWarp, compromises the security of virtual work environments based on AMD's trusted computing technologies, AMD SEV-ES and AMD SEV-SNP. Attackers can exploit CacheWarp to gain unrestricted access to the system by manipulating the buffer memory.

AMD Secure Encrypted Virtualisation (SEV) is a processor extension that ensures secure separation between virtual machines and the underlying hypervisor that manages the resources. By encrypting the data on the virtual machine, AMD SEV provides an added layer of security. However, CacheWarp can exploit this working environment by reverting data modifications and tricking the system into believing that it has an outdated status.

CacheWarp can reset the cache to a previous state by leveraging an unexpected interaction between CPU instructions and AMD SEV. This reset allows attackers to gain access to the system, subsequently acquiring full administrative rights to the data within the virtual machine. By bypassing secure logins and breaking through user-administrator barriers, attackers can extract, modify, and spread data throughout the user's infrastructure.

Upon discovering the CacheWarp vulnerability, the researchers promptly notified AMD, providing them with the necessary details to address the issue. AMD has identified CacheWarp under the identifier CVE-2023-20592 and is releasing a microcode update that effectively resolves the vulnerability. Further information regarding the update can be found in the AMD Security Bulletin.

The research team led by Michael Schwarz from the CISPA Helmholtz Centre for Information Security has created a dedicated website, cachewarpattack.com, to disseminate information about CacheWarp. Their scientific paper titled "CacheWarp: Software-based fault injection using selective state reset" has been accepted for the prestigious "USENIX Security" conference in 2024.

The discovery of the CacheWarp vulnerability in AMD processors highlights the need for constant vigilance and proactive measures to safeguard against potential attacks. AMD's swift response in addressing the issue demonstrates the importance of collaboration between researchers and manufacturers to ensure the ongoing security of systems. As the field of microarchitectural attacks progresses, organizations and individuals must remain vigilant, adopting robust security measures to safeguard against potential threats.

Oxford researchers build the world's first ultra-fast photonic supercomputing processor using polarisation

New research uses multiple polarisation channels to carry out parallel processing – enhancing computing density by several orders over conventional electronic chips. Chip Image. Credit: June Sang Lee

In a paper published in Science Advances, researchers at the University of Oxford, in collaboration with the University of Exeter, have developed a method using the polarization of light to maximize information storage density and computing performance using nanowires.

Light has an exploitable property – different wavelengths of light do not interact with each other – a characteristic used by fibreoptics to carry parallel streams of data.

Similarly, different polarisations of light do not interact with each other either. Each polarisation can be used as an independent information channel, enabling more information to be stored in multiple channels, hugely enhancing information density.

First author and DPhil student June Sang Lee, Department of Materials, University of Oxford said: "We all know that the advantage of photonics over electronics is that light is faster and more functional over large bandwidths. So, our aim was to fully harness such advantages of photonics combining with tunable material to realize faster and denser information processing."

The research team developed a HAD (hybridized-active-dielectric) nanowire, using a hybrid glassy material that shows switchable material properties upon the illumination by optical pulses.

Each nanowire shows selective responses to a specific polarization direction, so information can be simultaneously processed using multiple polarisations in different directions.

Using this concept, the researchers developed a photonic processor that utilizes polarisations of light to process information.

Computing is carried out through multiple polarisation channels, leading to an enhancement in computing density by several orders compared to that of conventional electronic chips.

For over a decade, researchers in Professor Harish Bhaskaran’s lab in the Department of Materials, University of Oxford, and in Professor Wright’s lab in the Department of Engineering at the University of Exeter, have been looking into using light as a means to supercomputing.

Professor Bhaskaran, who led the work, said: "This is just the beginning of what we would like to see in the future, which is the exploitation of all degrees of freedoms that light offers, including polarisation to dramatically parallelize information processing. Definitely early-stage work – our speed estimates still need research to verify them experimentally – but super exciting ideas that combine electronics, non-linear materials, and computing. Lots of exciting prospects to work on which is always a great place to be in!"

Professor Wright added: "Just a few years ago most people would have thought that computing with light lay within the realms of science fiction, but recent advances mean light-based processors could become a realistic commercial prospect in the not too distant future."

The full paper, Polarisation-selective reconfigurability in hybridized-active-dielectric nanowires, is published in Science Advances.

Rambus grows quarterly sales by 41 percent; driven by memory interface chips

Rambus Inc. has reported financial results for the first quarter ended March 31, 2022. GAAP revenue for the first quarter was $99.0 million compared to $70.4 million in 1Q2021, licensing billings were $64.1 million, product revenue was $48.0 million, and contract and other revenue was $20.6 million. The Company also generated $42.6 million in cash provided by operating activities in the first quarter.

“Rambus delivered a strong first quarter with record product revenue propelled by robust demand in the data center,” said Luc Seraphin, chief executive officer of Rambus. “With our balanced and diverse portfolio of offerings contributing at scale, we continue to generate cash, execute on our strategy and invest in exciting programs to accelerate the company’s profitable growth.”

The Company had a GAAP cost of revenue of $22.4 million and operating expenses of $68.3 million. The Company also had total non-GAAP operating expenses of $74.9 million (which includes the non-GAAP cost of revenue). The Company had a GAAP diluted net loss per share of $0.60. The Company's basic share count was 110 million shares and its diluted share count would have been 113 million shares.

Cash, cash equivalents, and marketable securities as of March 31, 2022, were $343.7 million, a decrease of $141.9 million from December 31, 2021, mainly due to approximately $174.5 million paid in connection with the repayment of 2023 senior notes, $55.1 million paid in connection with the settlement of warrants, partially offset by proceeds of $72.4 million from the settlement of senior convertible note hedges and $42.6 million cash generated by operating activities.

For the second quarter of 2022, the Company expects licensing billings to be between $61 million and $67 million. The Company also expects royalty revenue to be between $42 million and $48 million, product revenue to be between $49 million and $55 million, and contract and other revenue to be between $18 million and $24 million. Revenue is not without risk and achieving revenue in this range will require that the Company sign customer agreements for various product sales, and solutions licensing among other matters.

The Company also expects operating costs and expenses to be between $92 million and $88 million. Additionally, the Company expects non-GAAP operating costs and expenses to be between $79 million and $75 million. These expectations also assume non-GAAP interest and other income (expense), net, of ($1 million), a tax rate of 24%, and a diluted share count of 114 million, and exclude stock-based compensation expense ($9 million), amortization expense ($4 million), non-cash interest expense on convertible notes ($0.1 million) and interest income related to the significant financing component from fixed-fee patent and technology licensing arrangements ($2 million).